Received 01.12.2020, Revised 19.02.2021, Accepted 24.03.2021

Protecting intellectual property blocks in specialised plasma-based computers

Yaroslav Klyatchenko, Olena Mykhailyuk, Larisa Dudkova, Oksana Tarasenko-Klyatchenko

The current level of development of programmable logic chip architectures determines not only the expediency but also the desirability of their use in the development of specialised computer facilities or the combination part of computer equipment. Increase in the complexity of digital computing tools, especially in specialised critical application systems, focuses the attention of manufacturers and companies producing semi-finished products of programmable logic integrated circuits (PLICs) on the occurrence of situations related to the disruption of the correct operation of devices caused by both external influences and interference. While the phenomena caused by negative external influences, such as the Signal-Event Effect, may be associated with the transition to new technical standards for the manufacture of semiconductor products, namely FPGA chips, various interferences with the functioning of devices have anthropogenic roots. The widespread use of FPGAs for the implementation of specialised computer tools encourages the use of intellectual property blocks (IP-core), since to create some instances of hardware, it is necessary to implement broad functionality, which is done through IP. This approach makes it possible to implement a large functional set in specialised devices, overcome the complexity of their development and narrow the time frame.  This paper provides a partial overview of effective implementations of IP protection, which is a complex and important task. Various approaches and methods of organising such protection are described. The article also provides references to examples of the use of additional structures that complement encryption and authentication and make unauthorised access impossible

Intellectial property core; IP core; programmable logical devices; bitstream encryption; FPGA design protection; AES; HMAC; ECC; CRC; SEU
15-21
Klyatchenko, Y., Mykhailyuk, O., Dudkova, L., & Tarasenko-Klyatchenko, O. (2021). Protecting intellectual property blocks in specialised plasma-based computers. Information Technologies and Computer Engineering, 18(1), 15-21. https://doi.org/10.31649/1999-9941-2021-50-1-15-21

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