Received 29.04.2010, Revised 01.07.2010, Accepted 05.08.2010

Structural organization of ADCs with progressive bit-by-bit approximation cycle times

Alexey Azarov, Oleksandr Reshetnik, Oleksandr Murashchenko, Mykhailo Teplytskyi

The principles of structural organization of accelerated analog-to-digital approximation devices for the {0, 1} and {1, 1} SCHVNs are analyzed. The structures of bit-by-bit approximation ADCs with progressive durations of balancing cycles with weight redundancy are proposed. It is shown that serial binary DACs can be used to construct DACs with weight redundancy for such ADCs. An approach to constructing ADCs with weight redundancy is proposed.

ADC, DAC, weighted redundancy, progressive cycle times
6-13
Azarov, A., Reshetnik, O., Murashchenko, O., & Teplytskyi, M. (2010). Structural organization of ADCs with progressive bit-by-bit approximation cycle times. Information Technologies and Computer Engineering, 7(2), 6-13.

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