Received 10.12.2014, Revised 28.02.2015, Accepted 06.04.2015

Extrapolation method in digital integrating structures

Ihor Zhukov, Mykola Kovelev

the extrapolation method of Stieltjes integral by means of on-line arithmetic in symmetric redundant notations is proposed. In comparison with known difference schemes of digital integrating structure (DIS) construction it allows to overlap an extrapolation with integral increment caclculations on each integration step with the same order of accuracy. The method creates preconditions for productivity improvement of DIS, realizing nonautonomous integral calculations, in 1,5-2 times. Also the appropriate schematic is proposed

digital integrating structures, Stieltjes integration, extrapolation, On-line arithmetic, FPGA
33-39
Zhukov, I., & Kovelev, M. (2015). Extrapolation method in digital integrating structures. Information Technologies and Computer Engineering, 12(1), 33-39.

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